The present invention generally relates to semiconductor processing for integrated circuits. In one aspect, the present invention relates to reducing error in layer-to-layer overlay alignment. In another aspect, the invention relates to registration methods for asymmetrically deposited films, and more specifically, methods for reducing asymmetrically deposited film induced registration measurement error.
Integrated circuits (IC""s) are formed by sequentially creating layers on an integrated circuit substrate, such as a semiconductor substrate. These layers can include: insulating layers, polysilicon layers, and conducting layers, such as silicide or metal layers. The layers can be patterned or etched to form IC parts or features (e.g., electronic components, interconnections and the like).
For an IC to operate properly, structures within overlying layers must properly align with one another. However, as integrated circuits become more dense and complex, it is becoming increasingly difficult to achieve registration of overlying structures. Misalignment between the layers can be a limiting factor in achieving increased IC integration density and a functioning device.
Generally, registration of one patterned layer with another can be achieved using special registration marks that are designed into each layer. When the registration marks of one patterned layer are registered with those of a previously patterned layer, it can be assumed that the remainder of the patterned layer is also properly registered with that of the previously-patterned layer.
Monitoring and adjustment of the alignment process was originally performed by human operators using a microscope. The decreasing size of integrated circuit features and layers, and the increasing number of layers per wafer, have contributed to the development of automated alignment processes using specialized tools known in the art. Such tools, including but not limited to: proximity printers, projection printers, aligners and steppers, generally provide systems, methods and computer program products for aligning a pattern with respect to underlying or previous patterns, and/or to the underlying substrate. Such exposure tools (also called a xe2x80x9cpatterning toolxe2x80x9d) are described in greater detail, for example, in U.S. Pat. No. 6,064,486, the disclosure of which is incorporated by reference herein.
The registration mark(s) (also referred to herein as xe2x80x9coverlay mark(s)xe2x80x9d and xe2x80x9cregistration measurement structuresxe2x80x9d) may not be symmetrical, however, thus making it more difficult to find the center position of the registration mark. Moreover, even if the registration mark is symmetrical, subsequent processing can create an asymmetric coating that can include one or more additional layers on or adjacent to the registration mark. Asymmetry in such a coating, or in the mark itself, can result in an asymmetric registration signal that can cause registration of a patterned structure to be measured or perceived incorrectly.
If the registration structure comprises a raised feature or component (e.g., a mesa) or a depressed feature or component (e.g. a trench) on an integrated circuit substrate, one or more material layers may be formed onto the feature. Such layers can be formed asymmetrically over the feature due to the topography of the feature (e.g., raised or depressed), itself and/or due to asymmetries in the film or coating forming process. For example, metal deposition and photoresist film or coatings processes can produce asymmetries over the surface of a substrate. Such asymmetric films can make it difficult to accurately define the centerline of the registration mark, and thus, induce an asymmetric film registration error that can cause misalignment between consecutive layers of an IC.
Deposition processes are referred to as xe2x80x9cmetal deposition processesxe2x80x9d when the material layer being deposited is a metallic material. Sputtering of a metal onto a silicon wafer is one specific example of an xe2x80x9casymmetric deposition processxe2x80x9d. Sputtering techniques (also known as physical vapor deposition or xe2x80x9cPVDxe2x80x9d) are well known in the art. See Wolf and Tauber, Silicon Processing for the VLSI Era, Vol. 1, Chpt. 11, (Lattice Press 2000); Zant, Microchip Fabrication, pp. 411-16 (McGraw-Hill 2000); and Aronson, xe2x80x9cFundamentals of Sputteringxe2x80x9d, Microelectronics Manufacturing and Testing, January 1987. Examples of conventional sputtering techniques include high density plasma (HDP) or collimated sputtering. Another exemplary conventional sputtering process is the sputtering of aluminum for metal interconnects.
Attempts have been made to reduce and/or eliminate registration error caused by asymmetrically deposited films. For example, one solution has included an attempt to develop distinctive overlay marks, such as xe2x80x9cchopped overlay marksxe2x80x9d. However, while such overlay marks can work to affect the way asymmetric films are deposited, current registration tools and associated methods for their use have heretofore been unable to appropriately obtain accurate registration data. This has been the case for a variety of reasons, one of which is that the metal film that is deposited on registration marks can appear opaque to a broadband light of the kind typically used in current registration tools.
Accordingly, it would be desirable to provide methods, apparatuses and systems for reducing asymmetric film induced registration error in the semiconductor industry.
The present invention relates generally to semiconductor fabrication techniques and, more particularly, to the reduction, and potentially the elimination, of asymmetric film induced registration error is disclosed herein. The method, apparatuses, and systems disclosed herein ideally solve the aforementioned problems and reduce such false overlay error in a cost-effective manner.
In one aspect, the invention provides methods for reducing registration measurement error due to an asymmetrically deposited film using critical dimensions. The method employs a registration measurement structure formed in overlying upper and lower layers of a semiconductor construction, the lower layer comprising a first component of the registration measurement structure, and the upper layer comprising a second component of the registration measurement structure, the first component comprising a first edge and a second edge, and a first distance from the first edge to the second edge, and the second component comprising a first edge and a second edge. An exemplary registration structure comprises a box-in-box registration structure. One hallmark of the method is that critical dimensions of an overlay structure can be determined, and using the critical dimension determinations in conjunction with overlay measurements, registration error can be substantially reduced, and potentially eliminated.
In one embodiment of the method, the method comprises acquiring data from the first component of the registration measurement structure to provide a first critical distance value from the first edge to the second edge; acquiring data from the position of the first component in relation to the second component to provide an apparent registration measurement; acquiring data from the first component having an asymmetrical film layer deposited thereon, to provide a second critical distance value from the first edge of the first component to an edge of the film layer disposed contiguously to the first edge of the first component; comparing the second distance value to the first distance value to generate an alignment error value corresponding to a third distance value measured from said edge of the film layer to the second edge of the first component; comparing the apparent registration measurement and the third distance value to remove the alignment error and generate an actual registration value; and conveying the actual registration value to a patterning apparatus for aligning a subsequent layer to the structure.
In another embodiment, the method comprises determining a first critical dimension of the registration structure; determining an apparent registration measurement of the registration structure; measuring a second critical dimension of the registration structure when the registration structure comprises an asymmetrically deposited film; using the first critical dimension and the second critical dimension to determine the registration measurement error of the registration structure due to the asymmetrically-deposited film; subtracting the registration measurement error from the apparent registration measurement of the registration structure to generate a corrected data representative of an actual registration of the registration structure; and conveying the actual registration data to a patterning apparatus to align a subsequently patterned layer relative to the structure.
In another aspect, the invention provides methods for reducing registration measurement error due to an asymmetrically deposited film using gate imaging techniques. The method likewise uses a registration measurement structure as described hereinabove, which has a centerline value.
In one embodiment of the method, the method comprises obtaining a pair of gate images of the first material layer (first component) of the registration structure; determining an image centerline value of each of the images of the first material layer; averaging the image centerline values of the first material layer images to provide a first offset centerline value; obtaining a pair of images of the second material layer of the registration structure; determining an image centerline value of each of the images of the second material layer; averaging the image centerline values of the second material layer images to provide a second offset centerline value; comparing the first offset centerline value with a second offset centerline value to provide a first delta value (xcex941); manipulating the pair of images of the first material layer to obtain flipped images of the first material layer; determining an image centerline value of each of the flipped images of the first material layer; averaging the image centerline values of the first material layer flipped images to provide a third offset centerline value; comparing the third offset centerline value to the second offset centerline value to provide a second delta value (xcex942); subtracting the xcex941 value from the xcex942 value to provide a xcex94s value, and averaging the xcex94s value to provide a registration measurement error; subtracting the registration measurement error from the registration structure centerline value to generate a corrected data representative of an actual centerline value of the registration structure; and conveying the actual centerline value of the registration structure to a patterning apparatus to align a subsequently patterned layer relative to the registration structure.
In another embodiment, the method comprises obtaining a pair of images of the first material layer of the registration structure; determining an image centerline value of each of the images of the first material layer; averaging the image centerline values of the first material layer images to provide a first offset centerline value; obtaining a pair of images of the second material layer of the registration structure; determining an image centerline value of each of the images of the second material layer; averaging the image centerline values of the second material layer images to provide a second offset centerline value; comparing the first offset centerline value with a second offset centerline value to provide a first delta value (xcex941); manipulating one of the pair of images of the first material layer resulting in a flipped image and a non-flipped image of the first material layer; determining an image centerline value of the flipped image and the non-flipped image of the first material layer; averaging the image centerline values of the flipped image and the non-flipped image of the first material layer to provide a third offset centerline value; comparing the third offset centerline value to the second offset centerline value to provide a second delta value (xcex942); subtracting the xcex941 value from the xcex942 value to provide a xcex94s value corresponding to a registration measurement error; subtracting the registration measurement error from the registration structure centerline value to generate a corrected data representative of an actual centerline value of the registration structure; and conveying the actual centerline value of the registration structure to a patterning apparatus to align a subsequently patterned layer relative to the registration structure.
In another embodiment, the method comprises obtaining a pair of images of the first material layer of the registration structure; manipulating one of the pair of images of the first material layer resulting in a first flipped image and a non-flipped image of the first material layer; determining an image centerline value of the first flipped image and the non-flipped image of the first material layer; averaging the image centerline values of the first flipped image and the non-flipped image of the first material layer to provide a first offset centerline value; obtaining a pair of images of the second material layer of the registration structure; determining an image centerline value of each of the images of the second material layer; averaging the image centerline values of the second material layer images to provide a second offset centerline value; comparing the first offset center line value with a second offset centerline value to provide a first delta value (xcex941); manipulating a second of the pair of images of the first material layer resulting in first and second flipped images of the first material layer; determining an image centerline value of the second flipped image of the first material layer; averaging the image centerline values of the first and second flipped images to provide a third offset centerline value; comparing the third offset center line value to the second offset centerline value to provide a second delta value (xcex942); subtracting the xcex941 value from the xcex942 value to provide a xcex94s value corresponding to a registration measurement error; subtracting the registration measurement error from the registration structure centerline value to generate a corrected data representative of an actual centerline value of the registration structure; and conveying the actual centerline value of the registration structure to a patterning apparatus to align a subsequently patterned layer relative to the registration structure.
In another embodiment, the method comprises obtaining at least two images representative of a registration site that comprises an asymmetric deposition layer; measuring the images to obtain a first data set; flipping the two images to obtain flipped images; measuring the flipped images to obtain a flipped data set; comparing the first data set to the flipped data set to obtain an amount corresponding to the difference between the first and flipped data sets; removing the difference so as to obtain a true site offset data set substantially free of site error; and outputting the true site offset data set to counter registration site non-uniformity.
In another aspect, the invention provides a system for reducing registration measurement error caused by asymmetric film deposition. In one embodiment, the system comprises means for determining a first critical dimension of an alignment structure when the alignment structure is free of a asymmetrically deposited film; means for measuring a second critical dimension of the alignment structure when the structure includes an asymmetrically deposited film; means for comparing the first critical dimension to the second critical dimension to obtain an offset amount; and means for using the offset amount to achieve reduced registration measurement error due to the asymmetrically deposited film, the error reduced between the one layer and another layer in the integrated circuit.
In another aspect, the invention provides a system providing means for reducing registration measurement error cause by asymmetric film deposition using gate images.
In another aspect, the invention provides a computer readable medium on a computer. The computer readable medium comprises computer executable instructions for the foregoing methods.
In yet another aspect, the invention provides a computer programmed product for reducing registration measurement error using critical dimensions. In one embodiment, the computer program product comprises a computer readable storage medium having a computer-readable program code means embodied in the medium, and the computer-readable program code means comprises computer-readable program code for determining a first critical dimension of an alignment structure when the alignment structure is free of an asymmetrically deposited film; computer-readable program code for measuring a second critical dimension of the alignment structure when the structure includes an asymmetrically deposited film; computer-readable program code for comparing the first critical dimension to the second critical dimension to obtain an offset amount; and computer-readable program code for using the offset amount to achieve reduced registration measurement error due to the asymmetrically deposited film.
In yet another aspect, the invention provides a computer programmed product for reducing registration measurement error using gate images. The computer program product comprises a computer readable storage medium having a computer-readable program code means embodied in the medium, and the computer readable program code means comprises computer-readable program code for accomplishing the registration measurement error reduction.
In yet another embodiment, the invention provides a registration system. In one embodiment, the registration system comprises: (a) a registration measurement structure disposed within overlying layers of a semiconductor construction, a first component of the registration measurement structure disposed within a first layer of the semiconductor construction and comprising first and second edges and a distance therebetween, and a second component of the registration measurement structure disposed within a first layer of the semiconductor construction and comprising first and second edges; (b) a registration apparatus operable for acquiring image data of: i) the first and second edges of the first component, ii) the first and second edges of the second component, iii) an edge of a film layer asymmetrically deposited onto the second edge of the first component, and iv) the first or second edge of the first component in relation to the first edge of the second component; (c) a processor operable for producing distance values between said edges from the acquired image data, the distance values comprising (i) a first distance measured from the first edge to the second edge of the first component, and ii) a second distance measured from the first edge of the first component to the edge of the asymmetrically deposited film layer; (d) the processor further operable for producing an apparent registration measurement of the first component in relation to the second component based on measurements of the first or second edge of the first component to the first edge of the second component; (e) the processor further operable for comparing the second distance value to the first distance value to generate an alignment error value corresponding to a third distance between the edge of the asymmetrically deposited film layer and the second edge of the first component; (f) the processor further operable for comparing the apparent registration measurement and the alignment error value to generate an actual registration value corresponding to the position of the second component relative to the first component; and (g) the processor further operable to convey the actual registration value to a patterning apparatus for aligning a subsequent layer to the registration measurement structure.
In yet another embodiment, a registration system is provided similar to that described in the previous paragraph in which registration system accomplishes registration measurement error reduction using gate images.
Various other embodiments, features, objects and advantages of the present invention will be made apparent from the following detailed description and the drawings.